Integrated circuit arrays and semiconductor constructions

Some embodiments include memory arrays. The memory arrays may have digit lines under vertically-oriented transistors, with the digit lines interconnecting transistors along columns of the array. Each individual transistor may be directly over only a single digit line, with the single digit line being entirely composed of one or more metal-containing materials. The digit lines can be over a deck, and electrically insulative regions can be directly between the digit lines and the deck. Some embodiments include methods of forming memory arrays. A plurality of linear segments of silicon-containing material may be formed to extend upwardly from a base of the silicon-containing material. The base may be etched to form silicon-containing footings under the linear segments, and the footings may be converted into metal silicide. The linear segments may be patterned into a plurality of vertically-oriented transistor pedestals that extend upwardly from the metal silicide footings.

FIG. 1 is a diagrammatic top view of a portion of a semiconductor construction illustrating an example embodiment memory array architecture.

BACKGROUND

Memory is one type of integrated circuitry, and is used in computer systems for storing data. Memory may be fabricated in one or more arrays of individual memory cells. The memory cells are written to, or read from, utilizing digit lines (which may also be referred to as bitlines or sense lines) and access lines (which may also be referred to as wordlines). The digit lines may electrically interconnect memory cells along columns of the array, and the access lines may electrically interconnect memory cells along rows of the array. Thus, each memory cell may be uniquely addressed through the combination of a digit line and an access line.

Example memory cells are dynamic random access memory (DRAM) cells. A DRAM unit cell may comprise a transistor coupled with a charge-storage device, such as a capacitor. Other example memory cells may lack the capacitors of conventional DRAM, and instead may utilize electrically floating transistor bodies. Memory which utilizes electrically floating transistor bodies to store data may be referred to as zero-capacitor-one-transistor (0C1T) memory, as capacitor-less memory, or as ZRAM™ (zero capacitance DRAM), and may be formed to much higher levels of integration than DRAM.

A continuing goal of integrated circuit fabrication is to increase the level of integration. There may be corresponding goals to decrease the size of memory devices, to simplify memory devices, and/or to reduce the complexity and amount of wiring associated with memory devices. Another continuing goal of integrated circuit fabrication is to reduce the number of steps of a fabrication process, which can improve throughput and which may possibly reduce costs. Yet another goal is to achieve low resistance wiring, which can improve speed.

It would be desired to develop new memory architecture, and new methods of forming memory architecture, which further some or all of the above-discussed goals.

Read more at: